Ramith Hettiarachchi

Ramith Hettiarachchi

Jan
05

JAX 001 - A closer look at its background

3 min read
Sep
27

Summary of Paper - Representation Learning Via Invariant Causal Mechanisms (ReLIC)

2 min read
Jun
07

Our team - $T^3$, became the Champions of the IEEE Signal Processing Cup 2021 🎉

2 min read
May
12

Our team got qualified for the final round of IEEE SP Cup to be held at ICASSP 2021

Feb
04

Paper Accepted to ISCAS 2021

1 min read


My latest articles on Medium & Svbtle

Some Visualization Tools I've built
D* Lite
Algorithm
Visualizer

D* Lite Algorithm

As part of my internship project, I wanted to implement the D* Lite algorithm, with dynamic obstacle creation aspect
Intelliscope
Convolutional NN Visualizer

Project Intelliscope

As part of a medical research, built a model visualization tool to get more intuition on what sort of learning has the model performed.
Multi-Core Processor
Simulator

FPGA Group Project

To test our ISA and the functionality of any assembly code, I developed a tool to simulate the activity of each core.

Popular tags

Signals and Systems Experiments AVR stories news Mathematica